Mbe Mbock, Etienne Aubin
I am currently a PhD student in computer science, young researcher at the Ruprecht-Karl university of Heidelberg and junior lecturer at the applied university of Furtwangen. My research field covers problems that can arise in studying DPR including reconfiguration time, the complexity of the algorithm, the ability of the algorithm to be transformed in hardware. Such problems will lead to poor hardware performance, unpredictable behaviour and system failure. In my research, we combine hardware and software. This will involve defining more user-friendly languages that already exist like matlab, C/C++, VHDL to describe the finite-state automaton that models the system and the properties. These languages will then be translated to hardware, which is then used to check the given properties of the system. The fundamental goal of my research is to make the hardware creation more systematical (Numerical Analysis and Algorithms) with the use of system generation and verifying that the specification stage is useful for software and hardware engineers.